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  SST3958NL/u3958nl vishay siliconix new product document number: 72157 s-22527?rev. a, 17-feb-03 www.vishay.com 7-1 monolithic n-channel jfet dual product summary v gs(off) (v) v (br)gss min (v) g fs min (ms) i g max (pa)  v gs1 - v gs2  max (mv) -1.0 to -4.5 -50 1 -50 25 features benefits applications  anti latchup capability  monolithic design  high slew rate  low offset/drift voltage  low gate leakage: 5 pa  low noise: 9 nv ? hz  high cmrr: 100 db  external substrate bias?avoids latchup  tight differential match vs. current  improved op amp speed, settling time accuracy  minimum input error/trimming requirement  insignificant signal loss/error voltage  high system sensitivity  minimum error with large input signal  wideband differential amps  high-speed, temp-compensated, single-ended input amps  high speed comparators  impedance converters description the low cost SST3958NL and u3958nl jfet duals are designed for high-performance differential amplification for a wide range of precision test instrumentation applications. this series features tightly matched specs, low gate leakage for accuracy, and wide dynamic range with i g guaranteed at v dg = 20 v. pins 4 and 8 on the SST3958NL and pin 4 on the u3958nl part numbers enable the substrate to be connected to a positive, external bias (v dd ) to avoid latchup. the u3958nl in the hermetically-sealed to-78 package is available with full military processing. the SST3958NL in the so-8 package provides ease of manufacturing. the symmetrical pinout prevents improper orientation. the SST3958NL is available with tape-and-reel options for compatibility with automatic assembly methods. to-78 g 1 s 1 d 1 g 2 d 2 s 2 1 2 3 7 6 4 5 case, substrate to-78 top view u3958nl g 1 s 1 d 1 g 2 d 2 s 2 1 2 3 7 6 4 5 case, substrate s 1 substrate d 1 g 2 g 1 d 2 substrate s 2 narrow body soic 5 6 7 8 2 3 4 1 top view marking codes: SST3958NL - 3958nl absolute maximum ratings gate-drain, gate-source voltage -50 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gate current 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lead tempe rature ( 1 / 16 ? from case for 10 sec.) 300  c . . . . . . . . . . . . . . . . . . storage temperature -65 to 200  c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating junction t emperature -55 to 150  c . . . . . . . . . . . . . . . . . . . . . . . . . . power dissipation : per side a 250 mw . . . . . . . . . . . . . . . . . . . . . . . . total b 500 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . notes a. derate 2 mw/  c above 85  c b. derate 4 mw/  c above 85  c
SST3958NL/u3958nl vishay siliconix new product www.vishay.com 7-2 document number: 72157 s-22527?rev. a, 17-feb-03 specifications (t a = 25  c unless otherwise noted) limits parameter symbol test conditions min typ a max unit static gate-source breakdown voltage v (br)gss i g = -1  a, v ds = 0 v -50 -57 v gate-source cutoff voltage v gs(off) v ds = 20 v, i d = 1 na -1.0 -3 -4.5 v saturation drain current b i dss v ds = 20 v, v gs = 0 v 0.5 5 8 ma gate reverse current i gss v gs = -30 v, v ds = 0 v -10 -100 pa gate reverse current i gss t a = 150  c -20 -500 na gate operating current i g v dg = 20 v, i d = 200  a -5 -50 pa gate operating current i g t a =125  c -0.8 -250 na gate source voltage v gs v dg = 20 v, i d = 200  a -0.5 -2.5 -4 gate-source v oltage v gs i d = 50  a -4.2 v gate-source forward voltage v gs(f) i g = 1 ma, v ds = 0 v 2 dynamic common-source forward t ransconductance g fs v ds = 20 v, v gs = 0 v f = 1 khz 1 3.0 3.6 ms common-source output conductance g os f = 1 kh z 8 35  s common-source input capacitance c iss v ds = 20 v v gs = 0 v 3 4 common-source reverse transfer capacitance c rss v ds = 20 v, v gs = 0 v f = 1 mhz 1 1.2 pf drain-gate capacitance c dg v dg = 10 v, i s = 0 , f = 1 mhz 1.5 equivalent input noise voltage e n v ds = 20 v, v gs = 0 v, f = 1 khz 11 nv ? hz noise figure nf v ds = 20 v, v gs = 0 v f = 100 hz, r g = 10 m  0.5 db matching differential gate-source voltage | v gs1 ?v gs2 | v dg = 20 v, i d = 200  a 15 25 mv gate-source voltage differential change with temperature  | v gs1 ?v gs2 |  t v dg = 20 v, i d = 200  a t a = - 55 to 125  c 20 100  v/  c saturation drain current ratio i dss1 i dss2 v ds = 20 v, v gs = 0 v 0.85 0.97 1 transconductance ratio g fs1 g fs2 v d s = 20 v, i d = 200  a 0.85 0.97 1 differential output conductance | g os1 ?g os2 | v ds = 20 v , i d = 200  a f = 1 khz 0.1  s differential gate current | i g1 ?i g2 | v dg = 20 v, i d = 200  a t a = 125  c 0.1 10 na common mode rejection ratio cmrr v dg = 10 to 20 v, i d = 200  a 100 db notes a. typical values are for design aid only, not guaranteed nor subject to production testing. nqp b. pulse test: pw  300  s duty cycle  3%.
SST3958NL/u3958nl vishay siliconix new product document number: 72157 s-22527?rev. a, 17-feb-03 www.vishay.com 7-3 typical characteristics (t a = 25  c unless otherwise noted) 5 0-5 -4 -3 -2 -1 4 2 1 0 030 20 10 40 50 3 2.6 2.2 1 3 drain current and transconductance vs. gate-source cutoff voltage gate leakage current v gs(off) - gate-source cutoff voltage (v) v dg - drain-gate voltage (v) - gate leakage i g 0.1 pa 10 pa 1 pa i dss @ v ds = 15 v, v gs = 0 v g fs @ v dg = 15 v, v gs = 0 v f = 1 khz g fs i dss i gss @ 125  c i gss @ 25  c t a = 125  c t a = 25  c 200  a 100 pa 1 na 10 na 100 na 5 01216 8 420 4 3 2 1 0 output characteristics output characteristics v ds - drain-source voltage (v) v ds - drain-source voltage (v) - drain current (ma) i d - drain current (ma) i d -0.2 v -0.4 v -0.6 v -0.3 v -0.8 v -1.0 v -1.2 v -1.4 v v gs(off) = -2 v v gs = 0 v 5 4 3 2 1 0 v gs = 0 v v gs(off) = -3 v 2 0 0.6 0.8 0.4 0.2 1 1.6 1.2 0.8 0.4 0 output characteristics output characteristics v ds - drain-source voltage (v) v ds - drain-source voltage (v) - drain current (ma) i d - drain current (ma) i d v gs(off) = -2 v v gs = 0 v 2.5 2.0 1.5 1.0 0.5 0 0 0.6 0.8 0.4 0.2 1 v gs = 0 v v gs(off) = -3 v -0.3 v -0.9 v -0.6 v -2.1 v -1.5 v -1.2 v -2.4 v -1.8 v 1.8 1.4 i g @ i d = 200  a 50  a -0.2 v -0.4 v -0.6 v -0.8 v -1.0 v -1.2 v -1.4 v -1.6 v 01216 8 420 50  a -0.9 v -0.6 v -2.1 v -1.5 v -1.2 v -1.8 v -2.4 v i dss - saturation drain current (ma) g fs - forward transconductance (ms)
SST3958NL/u3958nl vishay siliconix new product www.vishay.com 7-4 document number: 72157 s-22527?rev. a, 17-feb-03 typical characteristics (t a = 25  c unless otherwise noted) 0.01 0.1 1 10 1 0 -1.5 -1.0 -0.5 -2.0 -2.5 4 3 2 1 0 0.01 0.1 1 130 120 80 110 100 90 0.01 0.1 1 100 10 1 100 5 0.1 1 0.01 100 80 60 40 20 0 transfer characteristics gate-source differential voltage vs. drain current voltage differential with temperature vs. drain current common mode rejection ratio vs. drain current cmrr (db) a v - voltage gain v gs - gate-source voltage (v) i d - drain current (ma) i d - drain current (ma) i d - drain current (ma) i d - drain current (ma) t a = -55  c 125  c v gs(off) = -2 v v dg = 20 v v dg = 20 v t a = 25  c 5 - 10 v v gs(off) = -3 v - drain current (ma) i d circuit voltage gain vs. drain current on-resistance vs. drain current i d - drain current (ma) 0.01 0.1 1 1 k 800 600 400 200 0 v gs(off) = -2 v a v  g fs r l 1  r l g os r l  10 v i d assume v dd = 15 v, v ds = 5 v v ds = 20 v -2 v -3 v 25  c  v dg = 10 - 20 v (mv) v gs1 v gs2 - v/  c () t    v gs1 v gs2 - v gs1 v gs2 -  v dg cmrr = 20 log  r ds(on) - drain-source on-resistance ( ? )  t a = 25 to 125  c  t a = - 55 to 25  c
SST3958NL/u3958nl vishay siliconix new product document number: 72157 s-22527?rev. a, 17-feb-03 www.vishay.com 7-5 typical characteristics (t a = 25  c unless otherwise noted) 10 100 1 k 100 k 10 k 10 0 -12 -16 -20 -8 -4 8 6 4 2 0 v gs - gate-source voltage (v) common-source input capacitance vs. gate-source voltage - input capacitance (pf) c iss v ds = 0 v 5 v 20 v f = 1 mhz 5 0 -12 -20 -16 -8 -4 4 3 2 1 0 common-source reverse feedback capacitance vs. gate-source voltage - reverse feedback capacitance (pf) c rss v gs - gate-source voltage (v) v ds = 0 v 5 v 15 v f = 1 mhz 16 12 8 4 0 20 equivalent input noise voltage vs. frequency f - frequency (hz) v ds = 20 v i d @ 200 ma v gs = 0 v 2.5 2.0 1.5 1.0 0.5 0 0.01 0.1 1 output conductance vs. drain current i d - drain current (ma) t a = -55  c 125  c 0.01 0.1 1 2.5 2.0 1.5 1.0 0.5 0 common-source forward transconductance vs. drain current i d - drain current (ma) t a = -55  c 125  c 1 k 0 -3 -5 -4 -2 -1 800 600 400 200 0 10 8 6 4 2 on-resistance and output conductance vs. gate-source cutoff voltage v gs(off) - gate-source cutoff voltage (v) r ds @ i d = 100  a, v gs = 0 v g os @ v ds = 20 v, v gs = 0 v, f = 1 khz r ds g os 25  c 25  c v gs(off) = -2 v v ds = 20 v f = 1 khz v gs(off) = -2 v v ds = 20 v f = 1 khz 15 v 20 v s) g os - output conductance (  0 e n - noise voltage nv / hz g os - output conductance ( s) r ds(on) - drain-source on-resistance ( ? ) g fs - forward transconductance (ms)


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